Can error-corrected memory and logic work on a heavy-hex superconducting processor?

A monolithic chip with uneven components

Fabricating a large superconducting processor does not produce identical qubits. The paper treats that heterogeneity as a design constraint rather than an accident: a useful architecture must tolerate some number of defective or underperforming components, otherwise manufacturing yields become prohibitive or code performance collapses on large chips. Scaling also multiplies the places where a qubit can leak out of the computational subspace, an error type the authors say can dramatically deteriorate performance.

The demonstration uses the entire 156-qubit device, named ibm boston, whose couplers form a heavy-hexagonal lattice. On that fixed connectivity the authors operate a dynamic compass code, a stabilizer code whose checks are measured in a redesigned schedule so that poorly performing components can be left out of the syndrome-extraction circuit. The two named exclusions in the memory experiments are qubits 46 and 85.

Three levers that lower logical error

The first lever is the decoder's noise model. A decoder guesses which physical errors occurred from the syndrome, and its accuracy depends on the prior probabilities it is given. The authors compare a baseline built from IBM's reported calibration snapshot, which keeps per-qubit and per-coupler error rates instead of averaging them over the device, against an ACES model that adds layer-specific reconstructed noise. A third, deliberately simple global model is also used for some decoding because it performed comparably regardless of the day data were collected.

The second lever is defect exclusion: rerunning the syndrome-extraction circuit with qubits 46 and 85 removed. The third is leakage post-selection, which discards shots whose IQ data indicate a high probability that a measured qubit has leaked; the memory analysis uses a cutoff of p = 0.9, while the stability analysis uses p = 0.7. These are filters on the analysed data, not hardware fixes, so their gains come with a cost in accepted shots that the paper reports alongside the error rates.

Memory gains come with discarded shots

In the memory experiment, logical qubits are prepared in a variety of stabilizer states, left to idle through several rounds of syndrome extraction, and then measured. This isolates how well the code protects stored quantum information. Combining the noise-informed decoder, exclusion of the worst qubits and couplers, and leakage post-selection produced improvements of up to 35% in logical error probability relative to the comparison baseline.

The number to hold onto is that 35% is a relative improvement in an error probability, not a claim that errors fell to 35% of physical levels or that the code crossed a threshold. The paper also reports the fraction of shots aborted per round under each configuration, so the improvement is tied to a specific filtering budget rather than being free. Patch-size comparisons in the same dataset show that a 7×7 patch did not automatically outperform smaller patches, and removing defects improved the 7×7 result, which is why the authors describe defects as a bottleneck on the distance the code can usefully reach.

Stability gains depend on the noise model

The stability experiment applies the same strategies to measurement-based logic, where the question is whether repeated syndrome extraction keeps a logical observable stable over rounds. Here the reported performance gains reach up to 56%. The stability analysis also uses soft measurement information, meaning the decoder receives shot-by-shot probabilities of classical measurement error derived from IQ data rather than a single hard bit.

That gain is conditional in a way worth flagging. The authors report that the benefit from soft information disappears when ACES noise information is used. They note this could be practically useful because collecting ACES data is costly in device and classical processing time, but they also say it remains to be established in which regimes the finding holds. So the 56% figure should be read as an outcome of a particular combination of decoder, noise model and filtering, not as a property of soft information alone.

Lattice surgery fidelity depends on filtering

Fault-tolerant logic is tested with lattice surgery, in which two logical patches are merged across a seam, stabilizers spanning the seam are measured for five rounds, and the patches are split again. The authors use this to teleport logical information from a source patch prepared in one of four cardinal states to a destination patch, counting a shot as successful when the decoded destination observable matches the initially prepared source state.

The headline fidelity numbers are a ladder of filters, not a single measurement. With pre-selection filtering, Bell fidelities exceed 77%. Adding logical-gap post-selection with exclusive decoding raises them above 97%. The logical gap is a decoder-derived confidence measure: shots whose correction is judged unreliable are dropped. The paper's own filter comparison shows most of the pre-selection benefit comes from requiring a clean code-space preparation with no violated detectors, rather than from leakage pre-selection alone. Accepted-shot yields fall as the gap threshold tightens, so the 97% figure describes a heavily filtered subset.

Better decoding cannot rescue bad components

The authors' own reading is that good noise characterization, accurate decoding and measurement soft information improve performance up to a point but are ultimately insufficient to overcome the effects of defects. Their practical conclusion is that future devices need better component homogeneity to avoid excessive defect exclusion, and active leakage removal such as fast multi-level resets, rather than relying on post-selection. They also note they did not test decoders more accurate than BeliefMatching, leaving neural-network or most-likely-error decoders as open options for coping with underperforming components.

A second structural point concerns connectivity. The authors argue that defect-exclusion strategies costing less in distance and fidelity could come from designs with more connectivity between qubits, because greater connectivity increases tolerance to defects. That is a design argument about future chips, not a result measured here.

Which number matters for which decision

The paper's results split by what a reader wants to decide. If the question is whether a monolithic heavy-hex chip with imperfect components can host error-corrected memory at all, the relevant evidence is the up-to-35% relative reduction in logical error probability from combining a noise-informed decoder, exclusion of qubits 46 and 85, and leakage post-selection at a 0.9 cutoff. If the question is whether measurement-based logic benefits similarly, the up-to-56% stability gain applies, but only with the caveat that soft-information gains vanish under ACES noise.

If the question is whether fault-tolerant logic is achievable, the lattice surgery ladder is the decisive comparison: above 77% Bell fidelity with pre-selection, above 97% once logical-gap post-selection is added, at the cost of accepted-shot yield. The authors' priority is clear from these splits: filtering and decoding buy substantial performance on today's heterogeneous hardware, but the binding constraint is component quality and leakage, which is why they place homogeneity and active leakage removal ahead of further decoder sophistication for future devices.

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