Can multi-agent LLM flows automate end-to-end analog RF chip design?

What the flow actually automates

The paper's target is the part of chip development where topology choice, device sizing, biasing and passive networks are tightly coupled. In a 60 GHz LNA, the authors note, changing a transformer resonance or a transistor finger count can substantially alter performance, so these decisions cannot be optimized one at a time. RFChipAgent addresses this by having a superagent orchestrate several specialized agents across the whole loop, with humans supervising rather than performing each step.

The loop has four working parts. A multimodal retrieval-augmented generation (RAG) subsystem reads existing engineering documentation and supplies design knowledge; it indexes each document privately with FAISS, which the authors say mitigates cross-document hallucination. A topology agent then chooses the circuit architecture, and a schematic and testbench agent assembles the circuit and its simulation setup. A sizing engine searches the design space, and a trust-scored database keeps only verified results to inform later trials.

The claim of end-to-end automation therefore means the flow spans knowledge ingestion, topology selection, schematic and testbench generation, optimization and knowledge accumulation. It does not mean the agents replace the simulator: every candidate is evaluated in a simulator-in-the-loop framework, so circuit performance is still judged by simulation rather than by the language model.

Why invalid designs are filtered before scoring

A trustworthy design loop has to stop bad candidates before they contaminate later iterations. The paper builds this in as physical-validity gates: a DC operating-point check and a stability check run before any objective is evaluated, so an invalid schematic cannot propagate through the optimization loop.

A second filter is the trust score assigned to each run. It weights execution integrity at 70% and data provenance at 30%. Execution integrity is a weighted sum of binary checks: PSF availability, nonzero DC power, full-band stability extraction, and optional corner/electromagnetic coverage. Provenance separately scores whether each reported number comes from verified Spectre data, PDK-derived priors, estimates, or missing data. A trial is admitted to the database only if it clears the trust threshold.

This matters for reading the results: every number reported in the paper comes from trials that passed both the physical-validity gates and the trust threshold, not from raw simulator output. The reported performance is therefore a filtered subset of everything the optimizer tried.

How the sizing engine searches the space

The sizing engine is a closed-loop hybrid: a Tree-structured Parzen Estimator (TPE) global phase followed by CMA-ES local polish, with every candidate evaluated in simulation. TPE proposes candidates broadly across the space, while CMA-ES refines locally around promising regions.

Between optimization campaigns, the LLM performs deterministic diagnostics and what-if analysis over the completed trial database. It looks for search stagnation since the last cost improvement, identifies free variables pinned at a search-space boundary in the top trials, and checks whether the best trial's margin on an unmet specification sits on the steep or flat region of that specification's sigmoid penalty. For boundary-pinned variables, the LLM helps distinguish a physical edge, where widening the bound is proposed, from a nonphysical edge such as a capacitance pushed toward a negative value, where removing that component from the topology is proposed instead. The authors present this judgment as something a numeric optimizer cannot make on its own.

The one trial that met every specification

Validation used a GF22FDSOI two-stage LNA targeting 60 GHz wideband operation, with specifications of S21 at least 25 dB, noise figure at most 4.5 dB, S11 at most -10 dB, in-band ripple at most 3.5 dB, and DC power at most 15 mW. The topology agent selected a neutralized-differential-pair second stage cascaded with a common-source degenerated first stage, matched with an input auto-transformer and two transformer-based interstage and output networks, consistent with a transformer-preference prior extracted by the knowledge-ingestion agent.

Among the five highest-ranked trials retained by the trust-gated database, only Trial #174 met every specification simultaneously: S21 of 27.1 dB, noise figure of 4.2 dB, S11 of -16.9 dB, ripple of 3.5 dB and DC power of 14.3 mW. The other four fell short on at least one metric. Trial #86, for example, reached 24.1 dB of S21 against the 25 dB minimum, and Trial #104 reached 23.4 dB with ripple of 3.7 dB against the 3.5 dB limit.

That gap is the most decision-relevant result in the paper. The flow did not produce a family of compliant designs; it produced one compliant design among the top five, which is why the specification-pass column matters more than any single headline number.

Two hours and $156.20 of compute

The paper reports the aggregate token usage and wall-clock time for the superagent orchestrating every step end to end. The campaign completed in approximately 2 hours of wall-clock time at an estimated cost of $156.20. The authors compare this with manual labor-intensive circuit design and call it a substantial improvement.

Two cautions belong next to that figure. First, the comparison baseline is described only as manual design, without a stated labor-hour count or cost, so the size of the saving cannot be checked from the packet. Second, the cost figure is an estimate and covers the LLM-driven campaign; the packet does not break out simulator time or separate it from orchestration time. The 2-hour and $156.20 numbers describe this one LNA campaign, not a general throughput rate.

Where the evidence stops

The validation is a single process and a single circuit class: GF22FDSOI, 60 GHz, wideband LNA topologies. The paper describes this choice as exercising every stage of the loop under demanding RFIC specifications, but it does not report results on other circuit types, other process nodes, or other frequency bands. The claim that the flow establishes a foundation for LLM-driven multi-agent EDA is the authors' framing of that single demonstration.

The paper also carries a review-status limit: it is a preprint submitted to ACM/IEEE for possible publication, so the reported results have not been through peer review in the version available here. The trust-score weights, the 70/30 split and the specific validity checks are design choices of this flow, not independently validated standards.

What to watch before trusting the flow

The most useful way to read this paper is to separate the flow's architecture from its demonstrated outcome. The architecture is a genuine end-to-end loop with filtering at two levels: physical-validity gates before objective evaluation, and a trust score before database admission. That filtering is what makes the single compliant trial credible as a verified result rather than a lucky simulator output.

The demonstrated outcome is narrower. One of the top five retained trials met all five specifications, and the efficiency claim rests on an estimated $156.20 and about 2 hours for one 60 GHz LNA campaign in GF22FDSOI. A reader evaluating whether to adopt this approach should ask first whether their circuit class and process resemble that LNA, and second whether a one-in-five top-candidate hit rate at these specifications is acceptable for their design targets. Those two conditions, not the headline automation claim, determine whether the result transfers.

Sources used in this answer