Which Inter-Electrode Structure Best Optimizes DC-RSD Position Resolution?

Position resolution follows the charge-sharing gradient

In a Resistive Silicon Detector, the collected charge is not confined to one electrode. It spreads laterally across a resistive n+ surface layer, and each electrode receives a fraction of the total signal set by the relative impedances of the paths connecting the hit point to every electrode, following a current-divider law. The hit position is then reconstructed from those fractions.

The paper states the consequence directly: for a fixed noise σn, the position resolution scales inversely with the local gradient of the reconstruction variable, σx ∝ σn / |∂(f6 + f7)/∂x|. A structure that makes the charge-sharing fraction change quickly with position gives a sharper position estimate; a structure that flattens that change gives a worse one. This is the quantity the paper uses to explain why the three candidate structures differ, and it is measured on templates computed over one pixel cell.

A resistor network replaces an intractable analytic impedance

The effective impedance between an arbitrary hit position and every electrode has no closed-form solution for an arbitrary geometry, so the authors built DCRSD SurfaceSimulator, a ROOT-based tool that discretises the resistive surface as a two-dimensional Kirchhoff resistive network and solves the resulting linear system for any injection position and inter-electrode structure. The simulation domain covers a 3×3 pixel area on a 301×301 grid, giving a node pitch of 3p/300 — 5 µm per node at the default 500 µm pitch.

The model distinguishes three surface conditions. A uniform surface layer contributes a conductance set by the surface resistivity ρs. A resistive strip adds a lower-resistivity band of width 0.05p in parallel with the surface, with its sheet resistance interpolated between the value at the electrode and the value at the mid-point. A trench suppresses all strip conductance and cuts edges crossing inter-electrode boundaries, except within a small radius around each electrode. The 'no structure' case sets the strip gap equal to the full pixel pitch, leaving a pure uniform resistive surface.

The paper positions this against TCAD-based DC-RSD studies, which resolve detailed device physics at the expense of computation time. The resistor-network model is deliberately narrower — it targets the inter-electrode charge-sharing problem — so that the broad parameter scans needed to compare structures become feasible.

Test-beam data validate the simulator across three pixel pitches

The simulator is validated against three test-beam data sets (TB7, TB8, TB9) collected at the DESY test-beam facility from the first FBK DC-RSD production. These sensors cover three pixel geometries — 300, 500, and 1000 µm pitch — and two surface resistivities, ρs = 800 Ω/square and ρs = 1500 Ω/square, all with trench isolation between pixels. The hit-position reference comes from a silicon telescope with track resolution of about 7–8 µm.

According to the paper, the simulator reproduces the position resolution, its spatial uniformity, and the signal-sharing templates correctly. That validation matters for how far the later comparison can be trusted: the structure comparison is run on the same model that was checked against measured sensors, not on an unvalidated idealisation. The measured resolution itself is parametrised as a jitter term that decreases with amplitude plus a constant term from the apparatus, with fitted constants k1 = 2.5 mV and k2 = 0.03.

The trench gradient collapses away from the pixel centre

The paper's mechanistic explanation rests on two representative points inside the pixel. At the pixel centre, the trench gradient is −0.93 mm⁻¹ against −1.44 mm⁻¹ for the bare surface — already about 35% weaker, consistent with the classical resistive-division result that sensitivity is maximal at the point equidistant from all electrodes. Near the pixel edge, at mid-height, the bare-surface gradient stays strong at −0.82 mm⁻¹ while the trench gradient falls to −0.16 mm⁻¹, a further factor of roughly six, leaving it nearly flat.

Because position resolution is sampled uniformly over the whole pixel area, and the trench's weak-gradient region covers most of that area, the paper identifies this collapse away from the centre — not a uniform reduction in sensitivity — as the dominant reason the trench under-performs. The charge-sharing contours support the same picture: they are nearly vertical, a clean function of x alone, for the bare surface and the resistive strip, but bow inward for the trench.

The strip ranking holds across input impedance

Using the full template-based χ² reconstruction for all five configurations, the paper reports the same ordering at every input impedance: RStrip500 < RStrip1000 < RStrip2000 < no structure < trench. At Rin = 0 the trench resolution is 19.7 µm, 36% worse than the best strip at 14.5 µm; at Rin = 100 Ω the trench is 24.0 µm, still 35% worse than the best strip at 17.7 µm. The trench penalty is therefore essentially independent of Rin.

The tail parameter ν separates the configurations even more sharply. The trench sits at 2.8–4.1, systematically far below every other configuration at 6.3–9.0, which the paper reads as confirmation of the heavier residual tails expected from the gradient collapse. The abstract summarises the headline comparison as resistive strips outperforming trenches by approximately 25% for all tested strip resistances (500–2000 Ω) and input impedances (0–100 Ω) at a surface resistivity of 1000 Ω/square.

Charge confinement buys leakage and resistance, not resolution

The resolution advantage comes with a counterpart. The trench, precisely because it electrically isolates each pixel, keeps leakage below 10%: the four central electrodes collect 90.7% of the signal at Rin = 100 Ω, up from 100% at Rin = 0, so up to 9% escapes only through the Rin path itself. Resistive-strip and no-structure designs leak 16–30% of the signal to neighbouring pixels over the same range. The paper notes that it is exactly this leaked charge that carries the positional information exploited in the resolution comparison.

The trench values are identical at the pixel centre and near the pixel side, confirming numerically that its charge-sharing response does not depend on position within the pixel. The other configurations show lower containment near the pixel side than at the centre — for no structure, 78.0% at the centre falling to 74.5% near the side at Rin = 0 — consistent with a charge-sharing gradient that stays non-zero all the way to the pixel boundary.

Inter-electrode resistance follows a similar split. Every configuration's effective resistance grows linearly with Rin by exactly 2Rin, a 100 Ω increase over the full scan range. At fixed Rin, resistance rises monotonically with strip resistance, from about 1.14/1.28 kΩ (side/diagonal) for RStrip500 up to about 1.64/1.80 kΩ for RStrip2000. The no-structure case reaches the highest resistance among the four at about 2.06/2.22 kΩ, only about 7% below the trench reference values of 2.2 kΩ (side) and 2.5 kΩ (diagonal). The paper's point is structural: any resistive strip sits electrically in parallel with the bulk sheet and can only lower the net inter-electrode resistance relative to no structure, never raise it, so reaching very high inter-electrode resistance with a resistive-strip design is fundamentally difficult. The trench could not be included in the full Rin scan because its free-floating resistance matrix proved numerically unstable in the sparse solver, so only its Rin = 0 reference values are quoted.

Where trench isolation still wins

Two considerations that the simulation does not address nevertheless favour trench isolation in specific operating conditions, and the paper is explicit that they are not simulation results. The first is timing resolution at low charge. Because the trench confines essentially all collected charge to the struck pixel at every hit position, the largest-signal electrode of that pixel receives a bigger fraction of the total charge than the corresponding electrode of a resistive-strip or bare-surface design, where the same charge is shared more evenly and over a wider area among the four central electrodes. Since the jitter contribution to timing resolution scales inversely with collected signal amplitude, a larger single-electrode signal improves that electrode's own time measurement — most relevant at low total charge, where jitter dominates.

The second is disambiguation of two nearly simultaneous hits in adjacent pixels. With trench isolation, no charge crosses a trench boundary except through the electrode metal itself, so if two particles strike adjacent pixels at nearly the same time, only the shared electrodes collect contributions from both signals while the other electrodes carry one particle's signal only. Each hit can still be reconstructed independently by combining independent and common electrodes. In a resistive-strip or bare-surface design, charge spreads measurably beyond the immediately bordering pixels, so a two-particle event can leave a mixed signal on more than the one geometrically shared electrode, making the two hits harder to disentangle.

Choose the structure by which performance you prioritise

The paper's own conclusion is that the choice of surface structure is a trade-off, not a single optimum. Where position resolution is the priority, a resistive strip or a bare surface should be preferred: strips give up to about 25% better resolution than an isolating trench, essentially independent of Rin, and the bare surface performs almost as well as the strips. Where the priority is instead timing at low charge or separating two nearly simultaneous hits in adjacent pixels, the same charge confinement that limits the trench's position resolution becomes an advantage.

The practical threshold the paper supplies is the gradient behaviour, not the average resolution. A trench's average resolution can look excellent while its gradient collapses to −0.16 mm⁻¹ near the pixel edge against −0.82 mm⁻¹ for a bare surface, and because resolution is sampled uniformly over the pixel area, that weak-gradient region dominates the outcome. For a future DC-RSD production, the decision therefore turns on whether the readout needs the leaked charge that carries positional information, or the confinement that preserves single-electrode amplitude and pixel independence. The simulator is publicly available for optimising the surface geometry of those future productions.

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